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Department of Computing
Course DOC 112 -- Hardware
Lecture 14: Let's Put it Together! -- A Manual Processor
In this and the next lecture we will design a digital device which works similarly
to a manual calculator. It is traditionally called an externally programmed digital
computer; although, it would be difficult to find one operating today. Normally,
there would be two kinds of signal inputs; one for digital data, the other
for "instruction" bits which tell the computer what operation(s) to perform:
. . 
Instead of using two sets of input lines, we will be cheap and allow only
one set. Also, we will restrict our data to be eight bits wide. As a compromise,
we will allow one extra bit for results (the extra bit will be used as a carry
out indicator). Our simplified computer is now:
. .
The question now arises: can any useful work be done with such asimple device?
Let us see how this device could be possibly used to calculate the average
of two numbers:
Average of two numbers: Result = (A+B)/2
1. Set the input bits to represent data A and push A clock pulse
is generated and the bits of A are stored internally.
2. Set the input bits to represent data B and push A clock pulse
is generated and the bits of B are stored internally.
3. Set the input bits to represent "add" and push A clock pulse
is generated and A+B data are stored internally.
4. Set the input bits to represent "divide by 2"
and push A clock pulse is generated and (A+B)/2 appears
as output.
From my Computer Architecture course I know that I can use a binary shift
instead of division by 2. Thus, Step 3 and Step 4 can be combined and treated
as a binary operation. In order to provide results, Step 4 can now by used
to clock the results into output register(s). The modified two last steps are:
3. Set the input bits to an "instruction code" A clock pulse is generated
and the
and push code is stored internally.
4. Push The required operations are executed and the result()s
are "clocked" into the output register(s).
Internal Registers and the Data Paths
The first step in the design is to decide on the number and types of internal
registers we need and the data paths between them. During the design these
may change as one finds out that the required operations cannot be executed
with the original configuration. The first version of required registers and
data paths are shown below:
.
Notice that on the data paths diagram there is no information how and when
data are transfered; only that data can be transfered between the input and
the three eight bit registers and that output is provided from the eight bit
result register and the one bit carry register (a single flip-flop). Notice
that the Arithmetic operator/shifter is not a register but a "simple" combinational
device, 24 bits in, 9 bits out.
The Arithmetic - Logic Unit
We have covered both arithmetic and shifting operations in previous lectures.
Now we apply our accumulated knowledge to build the arithmetic/logic unit popularly
known as the ALU. We are in luck, we do not really have to build the
arithmetic part of it. The IC catalogue provides us with an Arithmetic/Logic
Function Generator, but, unfortunately it is only a four-bit device:
. .
However, knowing functional design, we can turn two four-bit devices
into one eight-bit device in a jiffy:
. .
There are three select lines and for each bit combination we get a different
function as result:
The operations that the SN74381 device can perform are:
. .
Since A+B looks like the logical OR function, we indicate arithmetical
functions as pl (add) or mi (subtract) in the table.
There is this extra one bit input: Cin, what should be its value? A
logic 0, or a logic 1 or neither? Actually, we will be able to
do a lot more with our processor if we provide some flexibility for this independent
input. But how? There is a useful saying among digital designers: If you
have a problem to solve, use a multiplexer! We can add now a 2-to-1
multiplexer to allow two different carry bit values to input to the arithmetic
unit:
. .
The carry bit applied to the arithmetic unit can now come for two sources.
It may be a logic 1, or the carry bit stored in the C register
which was left there during the last operation. This arrangement looks rather
arbitrary, the idea behind it is that it is not difficult to produce a zero
bit in the C register by the selection of the appropriate ALU function.
Thus, the bit can be selected either a 0 or a 1 through the multiplexer.
The three F/alu bits (function bits for the ALU) provide the
selection of the arithmetic function, the one bit of F/cy (function
bit for carry selection) controls the multiplexer and hence the carry in signal;
together (four bits all) they determine the function of the arithmetic unit.
For example, if the stored bit in the C register is 0, F/alu =
011, and F/cy = 0 (carry input of 0), then we have a simple
binary addition; however, if we have F/alu = 011 and F/cy
= 01 (carry input of 1), we have the function: A plus B plus
1.
This concludes the arithmetic part of the ALU design. We need a binary shifter
now.
The Binary Shifter
The Binary Shifter circuit is also a combinational circuit, it has eleven
bits input and eight bits output since in addition to the eight data bits,
we have a Carry(in), and two function selection bits:
. .
The two function selection bits can specify four different functions; there
are three obvious ones: unchanged, shift right, and shift
left. However, there are two different types of shift right functions.
The logical right shift function shifts in a logic 0 into the
most significant bit; while the arithmetic shift right function leaves
the most significant bit the same. We may achieve this with a multiplexer (no
surprise! it is a multiplexer again!).
. .
For left shift we may want 0 (for both arithmetic and logical left
shift funtions) or possibly an independent carry input bit. We would need a
second multiplexer for this or a four-input one output multiplexer. We select
the latter one and arrive at our final shifter circuit:
. .
We have three function bits but not all eight selections provide meaninful
or unique functions. We can see this in the following table:
. .
Again, if we wonder how to build the shift circuit, multiplexers come to our
aid. See on the next page how it is done. Eight 4-to-1 multiplexers are
used with two selection control bits. The connection of the data input bits
to the multiplexer determines simply the output functions. For unchanged we
have Out[i] = In[i]. For left shift we have Out[i] = In[i-1],
except for the least significant bit for which Out[0] = CY/in. For right
shift we have Out[i] = In[i+1], except for the most significant
bit for which we have Out[7] = Cy/in. Quite simple (??) really!
The shifter is now connected to the arithmetic unit with a combined total
of six function selection bits. We have used one more bit to control the carry
bit input to the arithmetic unit, if we have eight bits in the "operation code" register,
we still have one more bit to play with. We will use this to allow the transfer
of data into the A register from two different sources. (Why? see later)
The complete data paths are now:
And the rest is left for the next lecture.
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